Three-Phase Space Vector PWM (SVPWM) Inverter Calculator

1. Three-Phase Voltage Source Inverters & Vector Control

In modern variable-frequency motor drives (VFD), robotics servomotors, and renewable grid-tied solar inverters, Field-Oriented Control (FOC) regulates the three-phase AC output by projecting sinusoidal variables onto orthogonal reference frames. The final control stage requires commanding a target voltage space vector $vec{V}_{text{ref}}$ of magnitude $V_{text{ref}}$ and angle $theta$ in the stationary Clarke $(alpha, beta)$ plane:

A two-level three-phase inverter consists of three complementary half-bridge phase legs ($A, B, C$) connected across the DC bus $V_{dc}$. Each leg switch can be either tied to the positive DC bus ($1$) or negative DC bus ($0$).

2. The 8 Switching States & The Voltage Vector Hexagon

With three binary switches, there are $2^3 = 8$ discrete switching combinations:

• Six Active Vectors ($V_1$ through $V_6$): $V_1 [1,0,0]$ at $0^circ$, $V_2 [1,1,0]$ at $60^circ$, $V_3 [0,1,0]$ at $120^circ$, $V_4 [0,1,1]$ at $180^circ$, $V_5 [0,0,1]$ at $240^circ$, and $V_6 [1,0,1]$ at $300^circ$. The amplitude of each active vector is: $$|V_k| = frac{2}{3} V_{dc} quad (k = 1, dots, 6)$$
• Two Zero Vectors ($V_0$ and $V_7$): $V_0 [0,0,0]$ (all three phase terminals shorted to negative rail) and $V_7 [1,1,1]$ (all three phase terminals shorted to positive rail). Both produce zero line-to-line voltage output ($|V_0| = |V_7| = 0$).

Connecting the tips of the six active vectors forms a regular hexagon in the complex $alpha$-$beta$ plane. The six triangular regions between adjacent active vectors define Sectors 1 through 6.

3. Dwell Time Calculations via Volt-Second Integral Balance

Within any given switching cycle $T_s = 1 / f_{sw}$, the target space vector $vec{V}_{text{ref}}$ located inside Sector $n$ is synthesized by time-averaging the two bounding active vectors $V_a, V_b$ and the zero vectors:

Where $T_1 + T_2 + T_0 = T_s$. For a relative angle $gamma = theta - (n - 1) cdot 60^circ$ inside Sector $n$ ($0 le gamma le 60^circ$):

4. The 15.5% DC Bus Utilization Advantage Over Sinusoidal PWM

The modulation index $m_a$ is defined as the ratio of fundamental peak voltage to the maximum theoretical linear boundary:

In traditional Sinusoidal PWM (SPWM), the maximum peak phase voltage is limited to $V_{text{phase,max}} = frac{V_{dc}}{2} = 0.500 cdot V_{dc}$.

In SVPWM, the reference vector can trace the entire inner circle inscribed within the hexagon without distortion:

This provides an immediate 15.47% increase in output AC line-to-line voltage ($frac{0.577 - 0.500}{0.500} = 15.47%$) for the exact same DC bus battery voltage, enabling electric vehicles to achieve higher maximum vehicle speeds before entering field-weakening.

5. Symmetric 7-Segment PWM Sequence Generation

To minimize inverter switching losses and eliminate odd harmonic sidebands, the zero vector dwell time $T_0$ is divided equally between $V_0 [0,0,0]$ and $V_7 [1,1,1]$. In Sector 1:

This mirrors switching around the center of the PWM cycle. Only a single phase leg commutates at each time boundary, reducing transistor switching transitions from 12 down to 6 per period.

6. Step-by-Step Worked Numerical Example: EV Motor Inverter

Consider an electric vehicle traction inverter operating at:

• DC Link voltage $V_{dc} = 400.0text{ V}$
• Target command voltage $V_{text{ref}} = 200.0text{ V}$, angle $theta = 45.0^circ$
• Switching frequency $f_{sw} = 16.0text{ kHz}$ ($T_s = frac{1}{16000} = 62.50text{ }mutext{s}$)

1. Determine Sector and Relative Angle: Since $0^circ le 45^circ < 60^circ$, the vector lies in Sector 1 ($n = 1$). $$gamma = 45.0^circ - (1 - 1) times 60^circ = 45.0^circ$$
2. Calculate Modulation Index ($m_a$): $$m_a = frac{sqrt{3} times 200.0}{400.0} = frac{346.41}{400.0} approx 0.866 quad (86.6% text{ Linear})$$ Since $m_a le 1.0$, the operation is safely within the linear modulation regime.
3. Calculate Active Vector Dwell Times: $$T_1 = frac{sqrt{3} times 62.50 times 200.0}{400.0} sin(60^circ - 45^circ) = 54.1265 times sin(15^circ) approx 54.1265 times 0.2588 approx 14.01text{ }mutext{s}$$ $$T_2 = frac{sqrt{3} times 62.50 times 200.0}{400.0} sin(45^circ) = 54.1265 times sin(45^circ) approx 54.1265 times 0.7071 approx 38.27text{ }mutext{s}$$
4. Calculate Zero Vector Dwell Time: $$T_0 = T_s - T_1 - T_2 = 62.50 - 14.01 - 38.27 = 10.22text{ }mutext{s}$$ Zero vector allocations: $T_0 / 4 = 2.555text{ }mutext{s}$ at beginning/end, and $T_0 / 2 = 5.11text{ }mutext{s}$ in the middle.
5. Calculate Individual Phase Duty Cycles (Sector 1): $$T_A = T_1 + T_2 + frac{T_0}{2} = 14.01 + 38.27 + 5.11 = 57.39text{ }mutext{s} implies D_A = frac{57.39}{62.50} approx 91.8%$$ $$T_B = T_2 + frac{T_0}{2} = 38.27 + 5.11 = 43.38text{ }mutext{s} implies D_B = frac{43.38}{62.50} approx 69.4%$$ $$T_C = frac{T_0}{2} = 5.11text{ }mutext{s} implies D_C = frac{5.11}{62.50} approx 8.2%$$

7. Microcontroller Timer Implementation Guidelines

• Center-Aligned Up-Down Counting: Configure the microcontroller PWM timer (e.g., STM32 Advanced Timer `TIM1` or TI C2000 `ePWM`) in center-aligned mode (counting $0 to text{ARR} to 0$). Update compare registers `CCR1, CCR2, CCR3` at the timer underflow interrupt.
• Dead-Time Insertion Hardware: Ensure hardware dead-band generation blocks ($DTG$) enforce the required blanking interval (e.g. 1.0 to 2.0 $mu$s for Si IGBTs, 200 to 500 ns for SiC/GaN) to avoid catastrophic DC rail shoot-through.
• Dead-Time Voltage Compensation: At low speeds and high currents, dead time introduces non-linear voltage errors that distort the motor current waveform. Add feedforward polarity-based voltage compensation ($Delta V = text{sign}(i) cdot V_{text{error}}$) to eliminate 5th and 7th harmonic torque ripple.

8. Discontinuous PWM (DPWM) & Switching Loss Reduction

In continuous 7-segment SVPWM, all three inverter legs toggle twice during each switching period $T_s$. At high switching frequencies or multi-megawatt traction powers, switching losses dominate total inverter heat dissipation.

Discontinuous PWM (DPWM) eliminates switching transitions by deliberately clamping one inverter phase leg continuously to either the positive DC rail ($V_7$) or negative DC rail ($V_0$) for $60^circ$ or $120^circ$ electrical intervals:

• DPWM1 / DPWM3: Selects between $V_0$ and $V_7$ so that the phase leg carrying the largest instantaneous phase current is clamped without switching. This directly slashes total inverter switching loss by up to $33.3%$ without reducing fundamental output voltage.
• Thermal Ripple Trade-off: While DPWM significantly lowers IGBT silicon junction temperatures at high modulation indices ($m_a > 0.7$), it moderately increases motor current ripple and acoustic noise at lower modulation indices, prompting modern drives to dynamically transition between continuous SVPWM at low speeds and DPWM at highway cruising speeds.

9. Overmodulation Regimes: Modes I, II & Six-Step Square Wave

When demanding peak dynamic vehicle acceleration, the commanded voltage vector exceeds the linear modulation limit ($m_a > 1.0$, corresponding to $V_{text{ref}} > V_{dc}/sqrt{3} approx 0.577 V_{dc}$):

1. Overmodulation Mode I ($1.0 < m_a le 1.05$): The reference vector trajectory is circular during part of the sextant but is clipped along the hexagonal boundary flat edges for angles near the active vector axes, causing small odd harmonic distortion ($5text{th}, 7text{th}$).
2. Overmodulation Mode II ($1.05 < m_a le 1.15$): As modulation index increases further, the reference vector holds stationary at each active vector vertex for an increasing holding angle $alpha_h$, jumping abruptly between vertices.
3. Six-Step Operation ($m_a approx 1.1547 = 2/sqrt{3}$): The inverter switches purely in six-step square wave mode ($V_{text{phase,peak}} = frac{2}{pi} V_{dc} approx 0.637 V_{dc}$), producing maximum possible motor torque at the expense of substantial low-frequency harmonic heating.