P-N Junction Depletion Width, Capacitance & Breakdown Calculator
Model semiconductor p-n junction electrostatics, built-in potential ($V_{bi}$), space-charge depletion width ($W, x_n, x_p$), maximum junction electric field ($E_{max}$), depletion capacitance ($C_j$), and avalanche breakdown voltage.
Space-Charge Density ρ(x) & Electric Field E(x) Profile
Junction Capacitance (Cj) & Width (W) vs Reverse Bias (VR)
P-N Junction Depletion Width, Capacitance & Breakdown Calculator - Free Semiconductor Tool: Free P-N Junction Depletion Width, Capacitance & Breakdown Calculator tool: calculate semiconductor p-n junction built-in potential (Vbi), depletion width.
Comprehensive P-N Junction Electrostatics & Breakdown Theory Guide
The semiconductor p-n junction is the elemental building block of modern electronic and optoelectronic devices, serving as the core of diodes, bipolar junction transistors (BJTs), solar cells, light-emitting diodes (LEDs), photodetectors, and MOSFET source/drain wells. Understanding its electrostatic behavior under zero and reverse bias is crucial for designing power semiconductors, high-frequency varactors, and low-leakage integrated circuits.
1. Thermal Equilibrium and Built-in Potential ($V_{bi}$)
When a p-type semiconductor (rich in mobile positive holes) is brought into metallurgical contact with an n-type semiconductor (rich in mobile conduction electrons), the immense concentration gradient drives holes to diffuse into the n-side and electrons to diffuse into the p-side.
This diffusion leaves behind uncompensated, immobile ionized dopant atoms: negatively charged acceptor ions ($N_A^-$) in the p-region and positively charged donor ions ($N_D^+$) in the n-region. The resulting electric field $mathbf{E}$ points from the n-side toward the p-side, opposing further diffusion and establishing drift-diffusion equilibrium.
Integrating Poisson's equation across the space charge region yields the **built-in potential ($V_{bi}$)**:
where $V_t = frac{k_B T}{q}$ is the thermal voltage ($25.86text{ mV}$ at $300text{ K}$) and $n_i$ is the intrinsic carrier concentration of the semiconductor.
2. Poisson's Equation & Depletion Region Width ($W$)
Under the depletion approximation, free carrier concentrations are assumed negligible inside the space-charge region $-x_p le x le x_n$. Poisson's equation for the electrostatic potential $psi(x)$ is:
Global charge neutrality dictates that the total negative charge per unit area on the p-side equals the total positive charge on the n-side:
Integrating electric field $E(x) = -frac{dpsi}{dx}$ twice and equating total potential drop to $V_{bi} + V_R$ gives the **total depletion layer width ($W = x_n + x_p$)**:
Individual depletion widths are apportioned inversely to doping concentrations:
3. Maximum Electric Field ($E_{max}$)
The electric field profile is triangular, peaking exactly at the metallurgical junction ($x = 0$):
4. Depletion Capacitance & Varactor Operation
A reverse-biased p-n junction acts as a parallel-plate capacitor whose plate separation is the voltage-dependent depletion width $W(V_R)$. The small-signal depletion capacitance per unit area is:
Plotting $1/C_j^2$ versus reverse bias $V_R$ produces a straight line whose slope reveals the effective doping concentration and whose horizontal intercept identifies the built-in potential $V_{bi}$. This voltage-tunable capacitance forms the operating principle of RF varactor diodes in voltage-controlled oscillators (VCOs).
5. Voltage Breakdown: Avalanche vs. Zener Mechanisms
When reverse bias increases, the internal electric field eventually triggers electrical breakdown:
- Avalanche Breakdown (Impact Ionization): In moderately or lightly doped junctions ($N_{dop} < 10^{17}text{ cm}^{-3}$), free carriers accelerated by $E_{max}$ gain kinetic energy exceeding the bandgap energy $E_g$. Upon colliding with valence electrons, they generate electron-hole pairs, launching an exponential avalanche multiplication. S.M. Sze's empirical formula models the breakdown voltage:
$$V_{BR} approx 60 left( frac{E_g}{1.1text{ eV}} right)^{1.5} left( frac{N_{light}}{10^{16}text{ cm}^{-3}} right)^{-0.75}quad [text{V}]$$
- Zener Breakdown (Quantum Tunneling): In heavily doped junctions on both sides ($N_A, N_D > 10^{18}text{ cm}^{-3}$), the depletion width is extraordinarily narrow ($W < 10text{ nm}$). At modest reverse bias ($V_R < 5text{ V}$), the valence band of the p-side aligns with the empty conduction band of the n-side, allowing electrons to tunnel directly through the thin barrier. Zener diodes have a negative temperature coefficient, whereas avalanche diodes exhibit a positive temperature coefficient.
6. Semiconductor Material Comparison Reference
| Semiconductor | Bandgap $E_g$ (300K) | Dielectric $varepsilon_r$ | $n_i$ (cm⁻³ at 300K) | Critical Field $E_{crit}$ (MV/cm) | Baliga Figure of Merit |
|---|---|---|---|---|---|
| Silicon (Si) | 1.12 eV | 11.7 | $1.0 times 10^{10}$ | 0.30 | 1.0 (Baseline) |
| Gallium Arsenide (GaAs) | 1.42 eV | 12.9 | $2.1 times 10^{6}$ | 0.40 | ~15 |
| Silicon Carbide (4H-SiC) | 3.26 eV | 9.7 | $8.2 times 10^{-9}$ | 2.50 | ~440 |
| Gallium Nitride (GaN) | 3.40 eV | 8.9 | $1.9 times 10^{-10}$ | 3.30 | ~870 |
| Germanium (Ge) | 0.66 eV | 16.0 | $2.4 times 10^{13}$ | 0.10 | ~0.2 |
7. Step-by-Step Worked P-N Junction Example
Analyze an asymmetric silicon $p^+n$ step junction at $T = 300text{ K}$:
- $N_A = 1.0 times 10^{18}text{ cm}^{-3}$ ($p^+$ side)
- $N_D = 1.0 times 10^{15}text{ cm}^{-3}$ ($n$ side)
- Applied reverse bias $V_R = 15.0text{ V}$
- Junction area $A = 0.05text{ mm}^2 = 5.0 times 10^{-4}text{ cm}^2$
- Silicon parameters: $varepsilon_r = 11.7$, $n_i = 1.0 times 10^{10}text{ cm}^{-3}$
Step 1: Calculate Built-in Potential ($V_{bi}$)
Step 2: Calculate Depletion Width ($W$)
Step 3: Calculate Peak Electric Field ($E_{max}$)
Step 4: Calculate Depletion Capacitance ($C_j$)
8. Linearly Graded Junctions ($N_D - N_A = a cdot x$)
In diffused junctions where dopants are introduced via thermal diffusion or deep ion implantation, the doping profile near the metallurgical junction is not an abrupt discontinuity but a smooth linear transition governed by grading coefficient $a$ ($text{cm}^{-4}$):
Integrating Poisson's equation yields a parabolic electric field profile and a cube-root dependence for depletion width and capacitance:
The built-in potential of a linearly graded junction is $V_{bi} = frac{k_B T}{q} lnleft( frac{a W}{2 n_i} right)$.
9. Forward-Bias Diffusion Capacitance ($C_d$)
Under forward bias ($V_a > 0$), minority carriers are injected across the junction and stored as excess charge profiles $Delta n_p(x)$ and $Delta p_n(x)$ in the neutral quasi-neutral bulk regions. Modulating the forward voltage alters this stored minority carrier charge, giving rise to **diffusion capacitance ($C_d$)**:
where $tau_T$ is the minority carrier transit/recombination lifetime and $I_d$ is the forward bias current. Because $I_d$ grows exponentially with voltage ($I_d propto exp(q V_a / k_B T)$), diffusion capacitance completely overwhelms depletion capacitance under forward conduction, governing diode reverse recovery switching time ($t_{rr}$).
10. Baliga's Figure of Merit (BFOM) for Power Devices
In power electronics, minimizing specific on-resistance ($R_{on,sp}$) for a targeted breakdown voltage $V_{BR}$ is the primary optimization objective. B. Jayant Baliga (1979) derived the fundamental theoretical limit:
Because critical breakdown field $E_{crit}$ appears cubed, wide-bandgap semiconductors such as 4H-SiC ($E_{crit} approx 2.5text{ MV/cm}$) and GaN ($E_{crit} approx 3.3text{ MV/cm}$) achieve on-resistances over 400 to 800 times lower than silicon for equivalent kilovolt breakdown ratings, revolutionizing electric vehicle traction inverters and fast-charging power converters.
Frequently Asked Questions
The built-in potential Vbi is the electrostatic contact potential developed across an abrupt p-n junction in thermal equilibrium due to majority carrier diffusion: Vbi = (k_B * T / q) * ln((NA * ND) / ni^2), where NA and ND are acceptor and donor dopant densities, and ni is intrinsic carrier concentration.
Applying a reverse bias voltage VR adds to the built-in potential barrier, expanding the space-charge depletion width according to the square-root law: W = sqrt((2 * eps_s / q) * ((NA + ND) / (NA * ND)) * (Vbi + VR)).
By global charge neutrality, q * NA * xp = q * ND * xn. If one side is heavily doped (e.g. NA >> ND in a p+n diode), the depletion region penetrates almost entirely into the lightly doped n-side (W ≈ xn), leaving negligible depletion depth xp in the heavily doped p+ side.
Junction capacitance Cj is the differential charge storage per unit area associated with uncompensated ionized dopants: Cj = eps_s / W = sqrt((q * eps_s * NA * ND) / (2 * (NA + ND) * (Vbi + VR))). It is voltage-dependent and utilized in RF varactor diodes.
Junction breakdown occurs via two physical mechanisms: Zener breakdown (quantum band-to-band tunneling occurring at high doping > 10^18 cm^-3 and low voltages < 5 V), and Avalanche breakdown (impact ionization multiplication occurring in lightly doped junctions with high critical fields ~300 kV/cm).